Huawei Targets 1.4-Nanometer Chip Performance by 2031 With New Design Architecture

Huawei Targets 1.4-Nanometer Chip Performance by 2031 With New Design Architecture

Huawei targets 1.4nm chip performance by 2031 via Tau Scaling Law: vertical stacking to cut signal latency, no transistor shrinkage required. A credible U.S.-curbs bypass that puts Ascend on the AI accelerator shortlist for enterprises with China exposure.