WARPTECHNEWS · LAB

Home AI Business Tech Archive

Storia: TSMC Develops AI Chip Packaging Tech to Counter Intel — Warptech Lab News

Storia in 6 fonti

TSMC Develops AI Chip Packaging Tech to Counter Intel

Taiwan Semiconductor Manufacturing Co. is developing an advanced chip-packaging technology similar to what Intel already offers, according to two people with direct knowledge of the project, a sign that the world’s leading chip manufacturer is worried about competition from a distant rival. Chip ...

Raccontata da

taipeitimes.com

cryptobriefing.com

newsroom.intel.com

theinformation.com

Confronto fonti

6 prospettive sulla stessa storia

AI · summaries

theinformation.comStai leggendo4 g fa

TSMC Develops AI Chip Packaging Tech to Counter Intel

Taiwan Semiconductor Manufacturing Co. is developing an advanced chip-packaging technology similar to what Intel already offers, according to two people with direct knowledge of the project, a sign that the world’s…

Timeline cronologica

martedì 28 luglio 2026·taipeitimes.com
Powertech says it is on track to ship for AMD soon - Taipei Times
Powertech Technology Inc (力成科技), which provides packaging services for memory and logic chips, yesterday said that it is on track to start shipping artificial intelligence (AI)…
mercoledì 29 luglio 2026·cryptobriefing.com
ASMPT CEO Robin Ng says chip architecture will keep evolving as AI demands more silicon
ASMPT CEO Robin Ng says AI systems will use more chips, driving demand for advanced packaging tools as multi-chip architectures reshape

4 g fa

TSMC Is Reportedly Developing Advanced Chip Packaging Tech to Challenge Intel's Dominance - Alphabet (NAS

TSMC is developing EMIB-like advanced chip packaging with Kinsus to challenge Intel's competitive edge in AI processor packaging. This threatens Intel's foundry differentiation strategy and could influence packaging standards across GPU and AI infrastructure stacks.

Leggi questa versione → originale

cryptobriefing.com3 g fa

Intel seizes opportunity as TSMC faces AI chip packaging constraints

TSMC CoWoS booked through 2027; Intel EMIB gains traction—Google orders 3M TPUs with 2028 delivery. Implication: breaks TSMC packaging monopoly on AI chips, enabling multi-sourcing and cost optimization via EMIB's lower-cost design.

Leggi questa versione → originale

hwupgrade.it4 g fa

Colpo di scena nel packaging: TSMC copia l'idea che sta facendo crescere Intel?

TSMC sviluppa con Kinsus packaging EMIB-like per risolvere bottleneck CoWoS (78 settimane wait time) sui chip AI. Packaging avanzato è fattore competitivo critico quanto litografia, essenziale per sbloccare capacità con domanda AI in crescita.

Leggi questa versione → originale

taipeitimes.com6 g fa

Powertech says it is on track to ship for AMD soon - Taipei Times

Powertech ships AI chips for AMD via fanout PLP in H2 2026: 45 per package vs 8-9 wafer—cost breakthrough. $400M Broadcom partnership: packaging density is now critical AI datacenter advantage—controls capex efficiency and time-to-market.

Leggi questa versione → originale

newsroom.intel.com5 g fa

Intel’s U.S. Advanced Packaging Enables Next-Generation AI Semiconductors

Intel's Rio Rancho scales chiplet packaging with Foveros and EMIB, pushing reticle limits 8x to enable massive AI packages. Heterogeneous die integration cuts AI accelerator NRE costs and lets OEMs compete against TSMC/Samsung in data center foundry.

Leggi questa versione → originale

mercoledì 29 luglio 2026·

newsroom.intel.com

Intel’s U.S. Advanced Packaging Enables Next-Generation AI Semiconductors

How Intel Foundry uses Foveros stacking, EMIB silicon bridges, and EMIB-T to scale chiplets, bypass the reticle limit, and power massive AI workloads.

giovedì 30 luglio 2026·

theinformation.com

TSMC Develops AI Chip Packaging Tech to Counter Intel

Taiwan Semiconductor Manufacturing Co. is developing an advanced chip-packaging technology similar to what Intel already offers, according to two people with direct knowledge of…

giovedì 30 luglio 2026·

cryptobriefing.com

TSMC develops AI chip packaging technology to compete with Intel

TSMC's new CoPoS chip packaging technology uses rectangular panels to boost AI chip production capacity, challenging Intel's EMIB platform with

giovedì 30 luglio 2026·

cryptobriefing.com

Intel strengthens position in packaging tech as TSMC scrambles to respond

Intel's EMIB packaging technology wins Google, Amazon, and Tesla as customers while TSMC develops a competing solution to counter Intel's growing

venerdì 31 luglio 2026·

hwupgrade.it

Colpo di scena nel packaging: TSMC copia l'idea che sta facendo crescere Intel?

TSMC starebbe sviluppando una nuova tecnologia di packaging ispirata a Intel EMIB per affiancare la famiglia CoWoS e rispondere alla crescente domanda di chip AI. L'obiettivo �…

venerdì 31 luglio 2026·

benzinga.com

TSMC Is Reportedly Developing Advanced Chip Packaging Tech to Challenge Intel's Dominance - Alphabet (NAS

TSMC is reportedly developing EMIB-like chip packaging, potentially challenging Intel's edge as Nvidia evaluates EMIB.

venerdì 31 luglio 2026·

cryptobriefing.com

Intel seizes opportunity as TSMC faces AI chip packaging constraints

TSMC's CoWoS packaging lines are booked through 2027, giving Intel's EMIB technology a window to win major AI chip customers like Google and

WARPTECH LAB NEWS

Warptech Lab News aggrega le notizie più rilevanti da oltre 700 fonti internazionali, con classificazione AI, TL;DR sintetici e timeline cluster su singole storie.

Navigazione

Home
Archivio
Editor's Brief
Cerca
Il tuo account
Newsletter tech/AI

Informazioni legali

Privacy Policy
Termini di servizio
Cookie Policy

© 2026 Sparktech S.R.L. — Tutti i diritti riservati. Sito gestito e manutenuto da Sparktech S.R.L.

Sede legale: Corso Libertà 55, 13100 Vercelli (VC), Italia · P.IVA / C.F. 02835910023 · Contatti: admin@warptechlab.com