(Image credit: Arm)
Arm is bringing its next-gen Neoverse CSS N4 platforms to the cloud, sporting up to 128 cores per die, built on TSMC’s N3P process. Arm’s Compute Subsystem, or CSS, is a semi-custom program that allows customers to design a chip based on Arm’s IP, configuring components like core count, cache size, I/O, and connectivity to fit their specific needs. It’s the same platform we’ve seen at work everywhere from CPUs at Azure and Google Cloud to DPUs at Nvidia and Intel.Arm says Neoverse CSS N4 supports between eight and 128 Neoverse N4 cores, running up to 3.8 GHz. Presumably, the clocks drop as the core count rises; Arm didn’t clarify the maximum clocks for each possible configuration. At a system level, Neoverse CSS N4 can scale beyond 128 cores, with support for multi-chiplet and multi-socket designs, and with support for UCIe through chip-to-chip interconnects, as well as “partner-specific PNYs.”The platform supports either DDR5 or LPDDR6, and features up to 256 MB of L3 cache per die. For local cache, Arm includes up to 2 MB of L2 per core, as well as 64 KB of L1 instruction cache and 64 KB of L1 data cache per core. For I/O, Arm supports up to 128 lanes of PCIe 7/6 and CXL 4.0.It’s a significant upgrade over the Neoverse CSS N2 platform, which topped out at just 64 cores, 1 MB of L2 cache per core, and 64 MB of L3 cache, paired with either DDR5 or LPDDR5 and 64 PCIe 5.0/CXL lanes.
