Their system links standard electronic chips with an all-optical network, replacing the copper wiring that normally shuttles data between processors, according to a study published May 19 in the journal National Science Review.
The South China Morning Post likened the design to snapping together Lego blocks.
Electronics For You, a trade publication, described it as an "all-optical supernode" built to ease the bandwidth, latency and energy-efficiency bottlenecks that pile up when many chips work on one AI job.
Rather than stacking more GPUs and building larger data centers, the team paired modest chips with tailored algorithms to cut both latency and the compute a task demands.
The group, led by corresponding authors Shu Haowen and Wang Xingjun, built its system around field-programmable gate arrays, or FPGAs, reprogrammable chips prized for parallel processing and used in everything from defense guidance systems to autonomous driving. Five of them were linked through a custom optical switch, each running one layer of a neural network.
