Xanadu Quantum Technologies and ASML are collaborating to improve lithography processes for quantum photonics, aiming to reduce optical signal loss in silicon photonic circuits. Their research focuses on minimizing Line Edge Roughness (LER) caused by DUV and EUV photolithography, which scatters photons in optical waveguides, with the goal of achieving ultra-smooth waveguide sidewalls for fault-tolerant quantum error correction.

Xanadu partners with ASML to reduce optical loss in photonic quantum chips, targeting over 1,000 logical qubits by 2031 as it builds its

The collaboration between Xanadu and ASML will examine lithography approaches for reducing optical loss in photonic quantum processors.