Signaloid Announces Preview of New ASIC Targeted at Physical AI and Robotics Applications
Signaloid previews a new ASIC purpose-built for physical AI and robotics workloads.
The chip, taped out with TSMC in partnership with IC-Link by imec and Cadence, is projected to deliver up to 1000× better performance-per-watt in key physical AI workloads.
Signaloid (https://signaloid.com), a computing platform company providing hardware and binary-translation-based acceleration of AI, robotics, aerospace, and quantitative finance workloads, today announced the tapeout and preliminary specifications documents for its C0-ASIC. Delivery of engineering samples to the first customer is due in Q3 2026 and additional FPGA-based systems implementing the ASIC’s design are under discussion for deployment in the UK and Switzerland later in 2026.
The C0-ASIC was targeted specifically at energy-efficient physical AI workloads. The UK Advanced Research and Invention Agency (ARIA) will take delivery of systems based on the ASIC for use in next-generation AI workloads such as second order methods.
