Huawei scientist says Nvidia will soon hit the same chip wall

Huawei Claims A Chip Path That Skips The Lithography Race

Huawei's Tau Scaling Law with LogicFolding achieves 238 MTr/mm² on 7nm by optimizing signal velocity instead of transistor shrinking, bypassing EUV constraints. This challenges Moore's Law but trails TSMC 3nm by 40 MTr/mm², requiring industry software-chip co-design shifts to gain traction.