The BIO has 4 FIFOs mapped to the BIO processors as x16-x19 r/w registers (blocking on read until new data is pushed), and in the host through BIO_BDMA_SFR_TXFx for writing data (PUSH) and BIO_BDMA_SFR_RXFx for reading (POP) data (or returning the last data read if nothing else is found), where x is a number 0-3 for the 4 FIFOs.

So in a BIO processor, an instruction like this:

mv t0, x16 # wait for FIFO0

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