SummaryRFIC design is a complex “dark art” that limits progress in wireless technologies like 5G, autonomous vehicles, and satellite communications.Princeton researchers use reinforcement learning and inverse design to rapidly create RFICs from scratch.Diffusion models rapidly generate novel or human-interpretable RF layouts, achieving record performance and drastically reducing design time.Future progress needs large, shared chip design datasets and open ecosystems so AI can learn universal electromagnetic and circuit behaviors.Take a moment and try to imagine your life without the wireless advances of the past three decades.Have you lost your luggage? What a shame AirTags have not been invented. The airline representative has promised to call with updates, so settle in for a long wait by the kitchen telephone, because there are no affordable cellphones. You’ll be stuck listening to whatever is on the radio while you wait, because there are no streaming services. That’s not even to speak of all the movie plots that would have been ruined.This is just a tiny sliver of how wireless technology makes itself felt in your day-to-day existence. The effects it has had on supply chains, infrastructure, and how the economy runs have been world-altering.None of it would be possible without the radio-frequency integrated circuits that allow all our devices to unobtrusively send and receive information.Now imagine what the further evolution of this technology will bring: Wide-spread autonomous vehicles, quantum communications, 6G mobile service and satellite communications. Continued momentum will depend on newer and more advanced versions of today’s RF chips.But there’s the rub. Whereas the design of most of the world’s computing chips has been standardized into its own science, RF design has remained stubbornly in the realm of art. A dark art, even, that is mastered only through years of experience. As any sorcerer will tell you, the dark arts keep their own schedule. And that schedule is impeding progress not just in RF chip design but in every other technology that depends on it.About seven years ago, in the wake of AlphaGo’s victory over world Go champion Lee Sedol, my students at Princeton and I began to wonder: Could AI be taught this art as well? Recent successes suggest that, to a large extent, it can. Over the last few years, our group and other leaders in the field have started to develop machine-learning-driven algorithmic methods for designing RFICs. Some of the resulting chips look more like modern art than circuit layouts. Yet in many cases, the physical prototypes bested state-of-the art circuits in terms of performance. The real achievement, however, is that it took the AI orders of magnitude less time to conceive a working design than it would a human designer.This is not about one or two RF chips. AI-enabled design could be the future of all RF design, and maybe much more.So why do these chips all have to be crafted by hand? Why aren’t RFICs designed with an algorithmic synthesis process, much as CPUs and GPUs are?The design of RFICs is an exercise in engineering across multiple physical domains. Maxwell’s equations, operating across different spatial and temporal scales, govern how electromagnetic fields interact with active and passive devices that must be carefully codesigned for the chip to function. Alongside these are the laws of thermodynamics, which determine how heat is generated and removed during operation, as well as the mechanics of thermal expansion and contraction that dictate how reliably the chip and its packaging survive temperature changes.Simultaneously accounting for all the physical constraints these impose makes the design space almost impossibly large. Every decision involves complex priorities that often compete with one another, preventing the optimization of any of them.To better understand the issue, let’s walk through the steps involved, after which you’ll better understand why a single new chip design takes years and tens to hundreds of millions of dollars. Most of the area of radio-frequency integrated circuits is dominated by complex electromagnetic structures. Human-designed RFICs, like this broadband power amplifier [1], start with templates and follow a symmetric, understandable pattern. But freed from the constraints of human-designed templates and the need for humans to even understand the rationale of electromagnetic structures, power amplifier ICs [2–5] and low-noise amplifiers [6] can take on truly wild-looking yet efficient designs. SENGUPTA LABLet’s say you’re an engineer assigned to design a new 28-gigahertz power amplifier for a 5G-millimeter-wave handset. (This is the type of RFIC that boosts the 5G signals on your phone and transmits them to the antenna where they can be picked up by a distant base station). Where do you start?RFIC design has some features in common with house building. Just as the blueprint for a house dictates the number of bedrooms and bathrooms to be built and the hallways connecting them, the blueprint for an RFIC—called the architecture—establishes the kinds of elements the RFIC needs to fulfill its intended function. Instead of rooms, the architecture includes, for example, the number of stages of amplification your power amplifier needs. Instead of hallways, it shows the paths that signals must take to get through those stages.The blueprint for RFICs is actually mostly hallway; passive elements, like inductors and transmission lines, take up far more real estate than active elements like transistors.Here’s why. As you have probably experienced yourself, a typical CPU’s transistors overheat when faced with operating frequencies of just a few gigahertz. The frequencies RFICs can operate at are higher by an order of magnitude—28 and 39 GHz for 5G signals, 26.5 to 40 GHz and even higher for satellite communications, and 77 GHz for automotive radar. Under this onslaught, a CPU’s transistors would fail.RFIC transistors avoid this fate because these chips cleverly manage the signal’s energy with careful electromagnetic design. This takes the form of byzantine networks of metal elements that dominate the chip’s real estate. These structures are geometrically regular, often symmetrical, and so intricately constructed they sometimes resemble lacelike filigree. But while they may look decorative, they are essential to the chip’s functioning.Electrically speaking, these “hallways” work more like the chip’s plumbing. Like plumbing, this extensive labyrinth of passives confines electromagnetic energy only to the places it should be traveling around the chip.The major challenge in RFIC design is putting all these elements together to ensure they work, just as constructing a house from its blueprints demands exact specs for load-bearing beams, pipes, and external walls. On an RFIC, the architecture needs to be realized with physically fabricable transistors and passive components that are connected just so, to permit the signal to travel through the chip and be processed. The way these devices are connected locally is what we call the circuit’s topology.The RFIC Design ProcessTo make that power amplifier, then, your first step is to identify a candidate circuit template: The combination of structures that will meet the goals of a particular architecture with a specific circuit topology. Over the years, researchers have eased your burden by developing reusable design templates for specific functions. For example, templates suggest how many amplification stages a circuit needs (because sometimes, combining the output of two smaller amplifiers will result in better bandwidth and efficiency than you would get from a single larger one). And they suggest what the general configuration of the passive structures should be. Today there is an extensive library of such templates.However, these can’t simply be used off-the-shelf, because each comes with trade-offs. Some have better gain at the expense of stability; some better bandwidth at the expense of efficiency; still others are more energy efficient at the expense of output power, and so on. There is rarely a clear best choice.To arrive at the “sweet spot” where all these different parameters are balanced into optimal harmony, designers will typically lay out several different versions of the circuit, using intuitions and methods they have picked up in their years of training.The challenge is that the decision around the architecture, circuit topology, or the electromagnetic passives cannot be done separately. One decision influences the others. So, designing an RF circuit can often feel like trying to fit an oversized carpet into too small a room—press down one corner, and another pops up.At microwave and millimeter-wave frequencies, even the smallest misstep is the difference between a chip that works and one that doesn’t, and any number of things can go wrong. For example, when an electromagnetic wave encounters a transistor—or any other component —the path it travels must be properly “matched” to what comes next. If it isn’t, some of the energy reflects backward instead of flowing forward. Imagine trying to connect a high-pressure fire hose directly to a narrow garden hose. Without the right adapter, water will splash backward at the junction. Very little will make it through. In electronics, this is called the impedance-matching problem.To prevent those reflections, engineers design special transitions, essentially microscopic adapters, that smooth the handoff between components. On a chip, these adapters can be surprisingly intricate. They don’t just pass the signal along; they can also split it, combine it, or distribute it across multiple paths with carefully controlled timing and strength.Once you’ve done the architecture, plumbing, and everything in between comes the moment of truth. Have all the choices you have navigated through the enormous design space resulted in an RFIC that meets its specifications? If the specifications are not met, you will have to go back, either redoing the topology or the entire architecture, and repeat the whole process. So get ready for months of time- and resource-heavy simulation and iteration. Perhaps you now see why, for decades, a core belief has persisted in the RFIC community: “RF design is an art.” It was said that only an experienced designer—with an artisanal understanding of how the pieces make up the whole—could master the subtleties of analog and RF design. Unfortunately, this entrenched notion has long held back algorithmic innovations in the field just when we need them most. Traditional, artisanal RFIC design is hitting its limits as the complexity of these systems inexorably grows.AI for RFIC DesignWhile RFIC designers continued their battle against their “oversized carpet” problem, a series of interesting developments emerged in allied disciplines. Across a range of other previously intractable problems like protein folding and climate modeling, AI has been able to successfully navigate multidimensional complex spaces. This gave us the incentive to look deeper into AI for RF. After all, the combinatorial complexity of protein folding is not that different from the nature of the design space in our domain.We were not the first to think of using artificial intelligence to speed up parts of RFIC design. Researchers had previously trained machine learning algorithms on circuit templates in the hope of speeding up the normal optimization processes. While this approach was undoubtedly faster than humans at optimizing templates, it still relied fundamentally on libraries of existing designs invented by humans.We didn’t want that. We wanted to break free from the restrictions of prefabricated topologies. Because while a designer’s experience and hard-won heuristics are crucial to building a working design, they also place fundamental limits on it. Furthermore, such an approach would necessarily require simulation steps as part of the optimization cycle, and even the fastest simulations use a lot of computing resources. Worse still, in many advanced cases, such as for broadband designs, there are no existing templates.But if we didn’t start with templates, where could we start?The goal here was to allow algorithms to determine—entirely from scratch—every parameter for architecture, constituent circuits, and electromagnetic passives. This approach differs fundamentally from conventional optimization, which is limited to determining the parameters—like transistor dimensions and passive component geometries—that optimize structures originally devised by humans.In our new approach, the architecture begins essentially from nothing and is progressively assembled through successive iterations. The system explores the design space by generating myriad candidate circuit combinations and mapping the resulting performance trade-offs as it navigates this landscape. Because the process is not biased by prior human design choices, it can produce completely novel circuit topologies that look markedly different from those created by human designers.In some ways, the approach echoes AI systems such as AlphaGo Zero, which achieved superhuman performance not because it was trained on games played by humans but because it explored the rules by playing against itself. Similarly, our algorithm develops new circuit architectures by exploring and evaluating its own design strategies. In so doing, it learns to understand circuits, electromagnetics, and the close codesign they need to achieve the end-to-end design of RFIC.Inverse Design for RFICsTo realize this capability, we proceeded in two stages. First, we developed a reinforcement-learning (RL) framework that determines the optimal system architecture, circuit topology, device parameters, and even the properties of the electromagnetic interfaces that connect different circuit elements. In this stage, the algorithm effectively defines how signals should propagate and interact across the system.The algorithm trains very similarly to how a computer learns to play a game. If you let it play enough times, it can learn to play better by observing the relationship between the actions it took and the score it achieves. In a similar way, the RL agent here learns to design effective circuits by playing with a set of combinations, and over time, it can map the space between the circuit performance to its architecture, topology, and parameters. This training takes a few days to a week, but once trained, the agent can design circuits very quicklyThe next step was to determine the physical structure of the IC’s electromagnetics—the plumbing—that can create the desired properties of the passive elements, which are characterized by a set of metrics called scattering parameters. These measure if a signal entering a component actually moves forward—or is reflecting backward, being wasted, as in our previous example with the fire hose and the garden hose.Deriving the structure from the desired scattering parameters is an example of an approach called inverse design, which appears across many areas of engineering. In structural engineering, for example, one might collaborate with an architect on a physical goal—such as creating large interior spaces with high ceilings—and then determine the arrangement of arches or buttresses that can support it.