That, at least, is the view of J.P. Morgan’s Harlan Sur, an analyst ranked among the top 1% on Wall Street.
“Contrary to the recent noise from sell-siders, Asia supply chain, and various news outlets that Broadcom/Google has delayed or canceled its next-gen Google TPU v9 2nm program, we believe, based on our own recent primary research work and past reports, that the team remains on track to ramp its next-gen TPUv9 2nm (4 compute die, 16 HBM stacks, 400Gbps SERDES) in CY28 – no delays/no cancellations,” the 5-star analyst said.
Sur points to the program’s development timeline as evidence for that view. The Broadcom team initiated IP design work for v9 in the first half of last year and began SOC design of the TPUv9 2-nanometer ASIC in the second half of last year, with the project remaining one of Broadcom’s highest-priority programs. Just as importantly, for the current-generation TPU v8i 3 nanometre programme (“Sunfish”), the analyst believes the Broadcom team was fully qualified in mid-CY25 and is expected to begin ramping this quarter.
By contrast, the analyst believes Google’s COT team (working with MediaTek) is still optimizing its current-generation “Zebrafish” TPU v8t 3nm design, implying an 18-month-plus lead for Broadcom over the COT team.
