South Korean chip startup FuriosaAI has partnered with Broadcom for the development of its third-generation AI accelerator, designed to support inference workloads.
According to Furiosa, the collaboration will see its Tensor Contraction Processor (TCP) architecture “evolve into a multi-die system” that is better suited for the “high-volume token requirements” of inference and agentic AI workloads.
FuriosaAI's first-generation RNGD chip – FuriosaAI
Designed to support high-bandwidth, rack-scale networking across large AI compute clusters, the third-generation accelerators are set to feature a 2nm compute die and HBM4/4E, and will integrate multiple silicon dies into a high-performance system-on-chip, while also incorporating Broadcom’s Ethernet and PCIe technologies.
In a statement, Furiosa noted that this architecture will make the chips better suited for “real-world AI workloads” and that by focusing on high-bandwidth data movement rather than thread management, the accelerators will deliver higher performance-per-watt and greater token density than “state-of-the-art GPUs.”
